Time-Based Evaluation Methods by Mike Resso: Choosing the Optimal Time-Domain Assessment
Mike Resso, a signal integrity application scientist at Keysight Technologies, is currently focusing on the complete multiport characterization of high-speed digital interconnects using Time Domain Reflectometry (TDR) and Vector Network Analyzer (VNA). With over 30 years of experience in the test and measurement industry, Resso is well-equipped to tackle the intricacies of designing and testing channels at 224 Gbps.
The Challenges and Solutions in 224 Gbps Channel Design
Designing and testing channels at 224 Gbps face significant challenges in PCB layout, S-parameter analysis, and measurement techniques like TDR vs. VNA. Resso emphasizes the importance of both time and frequency domain analyses for optimizing high-speed channel designs.
PCB Layout
High-frequency signal integrity issues such as transmission loss, crosstalk, impedance discontinuities, and jitter require precise trace geometry, controlled impedance, minimal via stubs, and careful material selection. Advanced PCB materials with low loss tangent, precise impedance control, minimized trace length and discontinuities, and sophisticated layout techniques targeting high-frequency SerDes signals are crucial for successful designs.
S-Parameter Analysis
Capturing accurate S-parameters becomes more difficult at these frequencies due to equipment limitations and noise. High-quality VNA measurements with meticulous calibration are necessary. S-parameters provide vital information for modeling channel response, allowing simulation of loss, crosstalk, and reflections in high-speed channels.
TDR vs VNA
TDR offers impedance profile insight but with limited bandwidth and resolution at very high speeds, while VNA provides frequency domain data essential for comprehensive S-parameter characterization. Combining TDR (possibly low-cost turnkey setups using oscilloscopes and power splitters, as shown by Keysight examples) for initial impedance profile and fault localization with VNA for detailed S-parameter analysis is effective. This hybrid approach enables better understanding and optimization of the channel.
Keysight’s Physical Layer Test System software
Integrating measurements and analysis to correlate physical layer performance (e.g., eye diagrams, BER) with channel models is complex at 224 Gbps because of signal integrity sensitivities. Keysight’s Physical Layer Test System software automates the correlation between S-parameters, time domain measurements, and physical layer performance. It facilitates comprehensive signal integrity analysis and helps identify design issues efficiently at very high data rates.
Additional Context
Channels at 224 Gbps typically use PAM4 modulation, increasing complexity over traditional NRZ signaling, demanding highly accurate modeling and verification methodologies to maintain error-free performance. SerDes technology is essential for managing such data rates, simplifying PCB routing by serializing parallel data and enabling effective mitigation of traditional parallel bus issues like skew and crosstalk.
Building a practical TDR from common lab equipment (oscilloscope + power splitter + function generator) has been demonstrated and can be leveraged for rapid impedance profiling, though its timing accuracy is limited by the scope’s bandwidth and sampling rate. VNAs remain the gold standard for comprehensive frequency domain characterization with extremely high resolution and accuracy, essential for extracting S-parameters that fully describe the channel at multi-hundred-Gbps speeds.
In summary, the combined use of detailed PCB design rules, high-fidelity S-parameter acquisition with VNAs, complementary TDR impedance profiling, and advanced analytics via Keysight’s Physical Layer Test System software forms the best practice for overcoming the critical challenges in designing and testing 224 Gbps channels.
Recommendations from Mike Resso
- For high crosstalk environments, an instrument with a high dynamic range like the Vector Network Analyzer (VNA) is necessary.
- The Vector Network Analyzer can be used to identify and measure crosstalk, insertion loss, and other signal integrity issues in high-speed digital interconnects.
- Mike Resso recommends the physical layer test system software for digital design engineers as a helpful tool for identifying and resolving signal integrity problems.
- TDR, time domain reflectometer, is an oscilloscope-based measurement technique commonly used by high-speed digital engineers.
- The Vector Network Analyzer has a wide range of capabilities, including frequencies from 9 GHz up to 120 GHz.
- In high crosstalk environments, a high dynamic range instrument like the Vector Network Analyzer (VNA) is essential for overcoming signal integrity issues in high-speed digital interconnects.
- To identify and measure crosstalk, insertion loss, and other signal integrity problems in high-speed digital interconnects, the Vector Network Analyzer can be an indispensable tool.
- Mike Resso advises that the physical layer test system software could serve as a beneficial tool for digital design engineers, aiding them in the identification and resolution of signal integrity problems.
- TDR, being an oscilloscope-based measurement technique, is commonly employed by high-speed digital engineers for assessing transmission lines and determining controlled impedance.
- The Vector Network Analyzer boasts a wide range of capabilities, spanning frequencies from 9 GHz up to 120 GHz, making it a valuable instrument in data-and-cloud-computing, technology, and finance industries, as well as in personal-finance, lifestyle, home-and-garden, shopping, business, and travel sectors.
